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// Determine smallest single-digit factor. using System; class Ladder { static void Main() { int num; for(num = 2; num < 12; num++) { if((num % 2) == 0) Console.WriteLine("Smallest factor of " + num else if((num % 3) == 0) Console.WriteLine("Smallest factor of " + num else if((num % 5) == 0) Console.WriteLine("Smallest factor of " + num else if((num % 7) == 0) Console.WriteLine("Smallest factor of " + num else Console.WriteLine(num + " is not divisible by } } }
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and the gold atom nucleus are shown on a standard x-y grid. The gold atom nucleus is located at the origin (0, 0). Assume that the gold atom nucleus is much more massive than the -particle
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29. In a Wheatstone bridge with R1 = 3, R3 = 8 it is found that balance is achieved when R2 = 7. What is the value of the unknown resistance 30. A 0.2 F capacitor is in an RC circuit with a 100 resistor. What is the time constant 31. A 0.2 F capacitor is in an RC circuit with a 100 resistor. How long does it take for all the voltages and currents to decay to zero 32. Find the inductance of a 500 turn coil linked by a 2 10 5 Wb ux when a 10 mA current ows through it. 33. Find the coef cient of coupling between a 0.2 H inductor and a 0.3 H inductor when M = 0.18. 34. A current increases uniformly from 1 to 5 A in a coil, over a period of 3 s. This induces a voltage of 5 V across the coil. What is the inductance of the coil 35. A 0.5 F capacitor is in series with a 10 V dc voltage source and a 1 resistor. Find the voltage across the capacitor as a function of time if the initial voltage is zero. 36. Consider an RL circuit with R = 10 , L = 4 H in series with a voltage source with v(t) = 4. Find the total solution. Assume the initial current is zero. 37. Consider an RL circuit with R = 10 , L = 4 H in series with a voltage source with v(t) = 4t. Find the total solution. Assume the initial current is zero. 38. Consider an RL circuit with R = 10 , L = 4 H in series with a voltage source with v(t) = 4t. Find the total solution. Assume the initial current is i(t) = 1 A. 39. Consider an RL circuit with R = 10 , L = 4 H in series with a voltage source with v(t) = 4 cos t. Find the total solution. Assume the initial current is i(t) = 0 A. 40. Consider an RL circuit with R = 10 , L = 5 H in series with a voltage source with v(t) = 5t 2 . Find the total solution. Assume the initial current is i(t) = 0 A. 41. A load has a voltage V = 40 10 and current I = 10 0 . Find the impedance and determine a series circuit that will model the load. Is the circuit inductive or capacitive Assume that = 100 rad/s. 42. A circuit has a given transfer function H. What is the condition for resonance
25:
PART II
4MB 4MB 45.5MB (5MB can be used for audio)
3
Figure 1-8: Use a tripod to stabilize your camera when shooting at slow shutter speeds. Figure 1-9: External flash units are more powerful than on-camera ones.
Ethernet over DSL is a fast growing technology, with VDSL now well suited for MTU/ MDUs and G.SHDSL for longer connections. The MTU/MDU market is very strong in Asia Pacific and Europe, and looking good in North America. Carriers using VDSL extensively are Belgacom, Chungwha, KDDI, KT, NTT, and SoftbankBB. A number of U.S. IOCs are deploying VDSL now, and ILECs are looking at VDSL technologies as the local loop vehicle for triple play (data, voice, and video) services to customers who might otherwise buy these services from a cable operator. AT&T s strategy is to use VDSL as soon as it is available for their FTTN plan to make IPTV services available to 18 million customers by end of 2007. ILEC/PTT selection of VDSL will be a boon to the technology, when the new VDSL2 products are delivered by manufacturers in 2007. Ethernet over cable technology has been deployed by a few cable operators on a very limited basis. Most cable operators appear to be awaiting DOCSIS 3.0 solutions or plan to use fiber Ethernet or PON to address the approximately 6 8 million businesses passed by coaxial cable networks. Cable operators are already using Ethernet over WDM heavily.
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accomplished by selective mismatching at either its input or output port. This is an important technique, since we do not always require all of the gain that can be supplied by a particular transistor. Thus, a stage can be designed for a certain gain (or NF) by actually not matching the load to the source by some predetermined amount. This technique is a powerful and legitimate one, but it is wise to attempt it only when we are using an unconditionally stable transistor. However, if the extra parts can be afforded in the amplifier design, fixed attenuators can also be adopted for this purpose where noise figure is not a concern. To carry out selective output mismatching of a transistor amplifier in order to lower its gain by mismatch losses, follow this procedure (Fig. 3.48): 1. Choose gain desired (GDESIRED) for the amplifier. 2. Calculate ML where ML GMAX (dB) GDESIRED (dB) mismatch loss, dB
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